Getting started with Mesa

Jan 13, 2026

Notes from my first weeks reading and building Mesa. Mostly for myself, but maybe useful if you're in the same position.

The source tree

AMD-specific code lives under src/amd/. RADV is in src/amd/vulkan/, ACO in src/amd/compiler/. NIR (Mesa's shared compiler IR) is in src/compiler/nir/. Everything else can wait.

Building

meson setup build -Dvulkan-drivers=amd -Dgallium-drivers= -Dbuildtype=debug
ninja -C build

Skip Gallium if you're only working on RADV/ACO. Debug builds are slower but you get assertions, which catch bugs early.

To use your build without installing system-wide:

export VK_ICD_FILENAMES=/path/to/build/src/amd/vulkan/radeon_icd.x86_64.json
export LD_LIBRARY_PATH=/path/to/build/src/amd/vulkan:$LD_LIBRARY_PATH

Reading the code

I traced vkCreateGraphicsPipelines end to end. radv_pipeline.cradv_shader.caco_interface.cpp → instruction selection, register allocation, scheduling → binary embedded in the pipeline object. Following one call path teaches you more than reading docs.

Debug env vars

When something breaks, diff the shader dumps before and after your change. Usually tells you exactly what happened.

First contribution

My first kernel patch removed unused code that generated warnings. Trivial, but it taught me the patch submission workflow and how maintainer review works.

For Mesa: make changes, meson test, format commit message (match existing style), push to GitLab, open MR, wait for CI and review. Maintainers will ask for changes.

Community

IRC on OFTC. #dri-devel for general Mesa, #radeon for AMD.

What I'm working on

ACO internals — instruction selection, register allocator, instruction scheduler. Textbook register allocation is graph coloring. ACO deals with VGPR vs SGPR, wave32/wave64, latency hiding through occupancy, spilling to scratch memory. The hardware constraints make it more interesting than the theory.

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